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POD's, N-B's, and G&S's

The Nerd-Box is a slang term for the early PDA-like electronic devices of the 1970's.  They are dull and bulky and reminiscent of the boom-boxes from which they derive their nickname.  The coin was termed in 1979 in an article in the LA Times.  They are associated with Nerds, or unfashionable and slightly conformist proto-geeks.  The alternate (and more popular) term Nerd-Blaster was probably coined in 1983, though the origin is unknown.  The Grip is an example of a similar device, which is often called a Geek-and-Spell.  The term first appeared in a science fiction comic book in 1975 and soon came to be associated with the Grip, as opposed to the Nack.  It is a much more ergonomic product and better marketed, though performances are comparable.  Geek-and-Spells have better peripherals in general than Nerd-Blasters.

The first Nerd-Blaster was the Portland Electronics Nack, released in 1972.  It was followed by European licensed clones in 1974.  It used a 2x2 grid of i4004 microprocessors.

The second generation (Nack II) was the N-976, release in 1976 and the Vicar, built under license by IBM, released in 1977.   The second generation used the i4040 microprocessor.

Then third Generation (Nack III) was released in 1979 to not much fanfare.  The Nack III used the i8080 processor.

The first Geek-and-Spell was the Motorola Grip I, released in 1974 and thereafter a new generation was released every two years until GIV (1980).

The third, and much less successful, line of PODs was the Titan, from Texas Instruments.  It was based primarily on the Nack architecture, but used ti's proprietary -120 memory system that was subsequently adopted by PE for the Nack-500 and IBM's abortive Bishop, which largely failed to sell in its targeted English market.

IBM created the fourth type of POD, originally the Bishop, of their own architecture, but incorporating ti's -120 memory format. 

Another popular (and slightly derisive) term for a device of this category is NGT or Nerd-and-Geek Toy.  Offically, as of 1975, they are all classified as PODs (Personal Organizational Devices).

All N-Bs and G&Ss (sometimes GnS) used copious battery power, often using banks of 4-12 batteries to last a single hour or less.  Vehicle and other 12V system adapters became common after 1975, and by 1976 universal A/C adaptors hit the market.


The First Generation Nacks

Nack (N1)

The Nack is a personal data device, created by Portland Electronics, and built on integrated semiconductor technology.  It was released in mid 1972 and marketed to the college age geek.  The Nack is the size of a commercial tape recorder from the late 60's (9"x12"x4") and ran on 4 D-size batteries and weighed 4 pounds. 

The read/write memory is in the form of a 2-head cassette player, which can store data in 768 bit blocks that occupy about a second-and-a-half of tape, for a data rate of 40 blocks per minute. 

Input is with a 48-key keyboard and output is a 4x24 grid of 9-segment LEDs which can display 56 characters at a time.  There is an input and output jack for recording or playing audio tapes, and a port to print on a teletype. 

The original Nack cost $600 when it was released, but success of the design led to increased development and marketing that led to an extremely successful line.  The original used a 1x2 array of i4004 MPUs controlled by the CB-12 CLU with a 2x4 grid of 8-byte RAM chips.

In 1973, Portland was approached by an English company wishing to build the Nack under license.  The negotiations were concluded in March of 1973 and production started of the British version, which sold for 200 quid and was called the Knack.  The technical specs were the same as for the Nack.

Also in 1973, a company called Parrot released a universal BIOS for the Nack that used Esperanto for the user language.

Encouraged by the success of the Knack, investors from France and Germany approached PE to acquire licenses of their own.  Negotiations were short and the Nack-100 was licensed and built in Europe (France, 'Nacque', 2000 fr; Germany, "Nak', 1000 DM) in 1974.   Many of these European units made their way back to North America, where they were sold second hand, often with a pirate BIOS for the desired language (usually English but increasing numbers of Esperanto versions entered the market after the Parrot BIOS was pirated as well).  All of these ROM changes were of necessity board-level chip changes and could not be undertaken by the average user.

The Esperanto version was so popular that as many as 1/3 of the N. American and 1/2 of the European models were eventually converted. 

Nack-100 (N1.1)

PE continued to develop the Nack, focusing on the continuous improvement model.  The first production release was the 100 series, which improved the performance compared to the original Nack.  It used the CB-13 CLU to control an array of three i4004s and a 3x3 block of 8-byte IC chips provided 72 bytes of RAM.  The Nack-100 was NOE-E language version only.  The assembly line was completed in August and production began in September.  That same month, they retailed for $500 each.  By Christmas of 1973, 600 total units had been sold (200 Nacks, 100 Knacks, and 300 Nack-100s).

The Nack-100 has a Buzz speed of 2.94 and is 70% faster than the Nack I.

The next major development was the CC-22 CLU, which could handle a 2x2 grid of i4004s.  It was incorporated into the next two series, the Nack-200 and Nack-300.

The Nack-200 (N1.2) was intended to be a low-cost model, and used the memory system of the Nack-100 (3x3 grid of 72 bytes).  As a cost-saving measure, the English language ROM was soldered onto the motherboard.  It retailed originally for $450 and sold 3,000 units in the year it was produced.

The Nack-200 is 2 1/4 times as fast as a Nack I.

The Nack-300 (N1.3) was optimized for performance.  It used a new memory system, utilizing a 3x4 grid (of 96 bytes).  The language ROM was socketed and came standard with the English ROM.  It was sold for $550 and sold 1,200 units in 1974.

The Nack-300 is thrice as fast as the Nack I.

The Nack-400 (N1.4) came out in 1975, and it incorporated Portland Electronics own version of Esperanto ROM.  It introduced yet a new memory controller, this time with a block of 4x4 of 8-bit chips (128 bytes).  The Nack-400 can switch between two language chips, but the motherboard must be removed and alternate chip (number 1) and the jumper must be soldered in place.  A low-profile socket could be added but is not included, although this is such a popular conversion that many 3rd party language ROMs come with the socket, header, and jumper.  The Nack-400 was the last Nack based on the i4004, and development on the series began after the 500-800 series, which used the i8008.

The Nack-400 is four times as fast as a Nack I.

Nack-500 (N1.5)

Since its release in 1972, engineers at Portland were eager to put it into a Nack.  Knowing the price of the incorporating 8-bit chips would eventually drop, they began development of a new CLU that could handle an 8-bit buss.  In the winter they set about the task of adapting the existing CLU to use a single 8008.   The architecture of the C-generation was found unsuitable and a request to draw up specifications for the E-generation CLU.

Specification CE was released in early-1973 but no work was started on the hardware until mid-1973 when the price of an i8008 dropped below the price of two i4004s. 

At this time the Nack-100 was in production and the Nack-200 and -300 were in development.  The Grip was yet to be released, though development at Motorola had been underway since late-1972, and sources in the industry had revealed rumors of its existence. 

Orders were given to develop the Spec CE CLU and a Nack around it.  It was initially anticipated that this product would be a prototype for the Nack-400 series as no other Nacks were being developed at the time. 

The CLU, the CE-1, was competed in late-1973 to address a single i8008.  The CE-1 consisted of 3 ASICs and included an I/O controller (1002), a memory controller (1001) and a task controller (1003).

In early-1974, development began on the platform hardware and continued until its release in mid-1975.  Originally, it had been planned to use the -128 memory format, but for cost reasons, the design used a 3x5 grid of RAM chips instead of 4x4.  The memory controller was the first thing designed as a modular way of incorporating grids had been earlier developed. It was released in early-spring of 1974. 

The I/O controller was designed after the discreet IC versions of earlier Nacks, but incorporated into a monolithic ASIC.  The task wasn't trivial, as optimization takes time and errors in ASICs are costly, therefore a wise developer verifies everything before it's produced.  The 1002 was released in the Fall of 1974.

Shortly thereafter, in the December of 1974, the management team was changed and all engineering projects were reviewed.  Four projects were in development at this time, the [(1x3)x8008]x(4x4), the [(1x2)x8008]x(4x4), the 8008x(4x4) and the [(2x2)x4004]x(3x5).  They approved all projects, and in January of 1975 gave the 4004 project the -400 series number and the 8008 the -500 to -700 series.

The 1003 was the hardest block to design and it was not finished until early-1975.  These new elements were incorporated into the basic Nack hardware and was released in mid-1975 as the Nack-500 series.

The Nack-500 retailed for $600 and only featured a single language socket which was unpopulated.

Despite its advantages, the Nack-500 is a compromise design and as a result is only twice as fast as the Nack I (and actually slower than the Nack-200 to -400).

Nack-600 (N1.6)

The -120 memory format proved to be less successful than the -128, so the next logical step was integrate it into the generation 1.5 Nack (as the 8008-based Nacks are called).  In general, the Nack-500 was considered slow when compared to the -200 to -400 series.  Consequently, a new Nack design was started to use two 8008s.

Development on the the -600 series was begun in 1973, while the Nack-200 and -300 were still being developed, so at first, the project didn't have a name.

The Nack-600 used the -128 byte standard memory block.

The CLU was not revolutionary, consisting of two of the same ASICs used in the CE-1 (the 1002 and 1003).  The memory controller had to be different though, and a modular design was created that could be arrayed.  The ASIC was the 1010 memory controller.

The 1002, 1003, and two 1010s consituted the CF-12 CLU. 

The Nack-600 had a dual-socketed ROM bank which usually featured Esperanto in socket 0 and an empty socket 1.  The Nack-600 was the first Nack to offer Spanish language.

The Nack-600 is 4.3 times as fast as a Nack I.

Nack-700 (N1.7)

The N-700 Universal Nack was designed in record time.  It used the CF-13 CLU (consisting of a 1002, 1003, and three 1010s) controlling an array of 3 i8008s.

The Nack-700 was Universal because it came with a populated bank of two socketed Language ROMS, Esperanto (0) and a language of the user's choice (1) as a standard option.

The Nack-700 has a Buzz speed of 3.452 or 6.5 times the speed of a Nack I.


The Nack-800 was designed to push the limits of the Nack arrayed-processor design.  It incorporated four 8008s in a 2x2 grid.  It was controlled by the CF-22 CLU which used the same components of the other 8008 Nacks and added the 1011 column controller. The CF-22 consists of (1002, 1003, two 1010s, and two 1011s).  The RAM structure was simplified by substituting two i3202s for the i3101 used in all previous Nacks.

Development of the Nack-800 began in 1975, after the N2 platform had already been developed and prototyped.  It was shelved in 1976.

The N-800 prototypes were fast (Buzz speed 3.65), just over 8.6 times faster than the original Nack.  But it was expensive to produce because of the ASICs involved.  The time of the MPU was fading and the CPU was coming into its own.  The N-900 prototype was slower than the Nack-800 as were the rest of the Nack II's (N-900, 3.7x; Vicar, 4x, and N-976, 6x).

Second Generation Nacks (N2)
N-976 ('Nack II')

PE management changed in December of 1974 and the marketing strategy that made the Nack a success was abandoned.  Already the i4004 had been superseded by three generations of intel processors. 

The i4040 was originally considered for the new platform that was to replace the then current Nack-600 series, but the much newer i8080 offered more performance for the price of four 4040s and integrating it into the CLU would be much simpler. 

In February, it was decided that the new platform would use a single 8080 and a custom CLU and would be able to address 64 kiB of RAM, but would use the rest of the hardware from the Nack.

By March, samples of the new processor had been received and work had begun on the design.  It became immediately obvious that much of the CLU could be replaced with a minimum of 'glue logic' of a vastly simpler design.  This saved space, but not enough. 

The selection of RAM had not been completed, but no available technology could be used to put 64 kiB of memory on the main board.  A decision was make to allow space for 1 kiB and provide a specification for adding the additional memory.

Another problem that was early identified was the cost and complexity increase going from a 4-bit to 8-bit data bus. 

In April, rising projections of cost estimates for both development and initial production, and difficulty of obtaining the new chip, caused the management to table the project for future development (3rd generation) of the Nack, which had reached the 700 series by now.

The engineers at PE were then directed to develop the second generation Nack using the 4040.  This presented some big challenges, but using the 4040 proved to be a wise choice.  It did not possess the external address bus that allows the 8080 to address 64 kiB of memory, but its architecture was not such a radical departure from the 4004.

Returning to a simpler processor necessitated a CLU, so initial recommendations were to not use a single 4040. Since the price of a 2x2 matrix of 4040s was prohibited, the choice was made to use two.  The 4040 has also come out in 1974, but unlike the 8080 the supply was not as limited.

Reducing the matrix to 1x2 further simplified the design of the CLU to one, rather than three major blocks.  This would be connected to CPU 0 and CPU 1 via two 4-bit busses and a 12-bit external memory bus that could address 512 Bytes of memory.  The new platform would have a 3x5 matrix of 1103s for a block size of 960 bits (240 nibbles or 120 Bytes).  To compensate, the block size for the tape was further increased to 1875 milli-seconds, which reduced the number of blocks (and thus the storage capacity) on a given length of tape.

The CLU was made into one integrated custom codec, and had the ability to boot off of either of two BIOS chips.  The default (0) BIOS was Esperanto, and an optional chip was left empty for addition of another language without having to physically change the chip.

LED's were discarded for the display for the second generation in favor of in integrated display valve (IDV) that used much less power and provided a screen that could display 8 lines of 64 characters.  Each character uses 13 filaments.

Power for the new platform was to be provided by six C-sized batteries, as they represent a better power density than D-size.

By the time the new Nack was ready, production was about to begin on the 800 series, so marketing decided to use a number in the 900's for the model, but shorted Nack to just the letter N.  As the first units were to be produced in 1976, the new platform was given the designation N-976.

This proved to be a marketing disaster, as Nack had developed a good reputation, and customers did not prefer a numerical designator.  Nor did they like the single model number in place of a series number, since they had grown accustomed to seeing the numbers change as the design evolved, and expected it to correspond to features of the particular variant the series number represented.

The N-976 sold for $750 when it debuted in October of 1976, but it sold less than 100 units by the end of the year.  In contrast, the various versions of the Nack had sold at least 3,500 units world-wide by January of 1977.


Motorola Grip

The grip was a 12" x 12" x 2" with a one corner cut off.  There was a handgrip on that fifth face, with trigger-buttons to operate the tape mechanism on the inside of the grip.  The unit is built on a 1/2" radius curve around the edges.  There six feet on the back panel and six 'fins' moulded into the case along the bottom edge to allow the unit to be stood normal to the ground.

The Grip developed in three generations, The main difference between the Grip I and Grip II was the microprocessor.  The Grip I used an intel processor and could run in its native mode or emulate the Nack.  Later Grips used Motorola processors and could not Emulate a Nack.  The Grip III was downward compatible with the Grip II but not the Grip I. 

The unit is powered by 12 AA batteries.

Grip I (1974)

The Nack's biggest competitor, besides the various clones, was the Motorola Grip I, which was designed from 1972-73 and released in the first quarter of 1974.  The Grip sold for $450 in HamCo stores, or $500 from other dealers.  The first ad campaign featuring the product used the slogan "Get a Grip" and immediately resulted in an ad war with a competing PE ad urging customers to "Get the Nack."  The campaign lasted until 1978.

When it debuted in 1974, it was faster than both the Nack (by twice) and the Nack-100 (by almost 30%)

It featured:
  • 24 column, 3 line, 13-segment LCD display
  • Full-sized 53-key keyboard.
  • The tape drive is integral to the unit itself; the mechanism accepts a tape through a slot on the top side of the unit.
  • Expansion bay.  This bay is approximately 3"x5"x1" (plus external clearance of 3") and can host a variety of peripherals:
    • CR7 Cash register printer.  12 column, 7-pin dot matrix printer with black or red ribbon.  Uses 3" paper tape, 3" labels, or special sticker tape.  The printer can be used to print a newspaper, by printing the headers in banner format and the content in columns pasted onto a backing.  The printer can print 168x224 pixel 1 color-pictures.
    • Auxiliary tape deck, record only.
    • LCD-511 Backlit 120x240 pixel monochrome LCD monitor.
    • 1/2 watt solar panel.
    • Breadboard. 
  • Six 6-volt incandescent light sockets with color-coded lenses, each linked to an output on the processor.  They are used to signal operation of hyperlink-like functions built in to the Grip.
  • Fully-integrated IC suite:
    • i8080 microprocessor:
    • ASIC RAM controller.
    • ASIC I/O controller.
    • ASIC tape-drive host adapter (hosts 2 drives).  The drive uses an optical sensor to determine the difference between side A and B (channel 0) or side C and D (channel 1).
    • ROM host, with integrated Esperanto ROM and Optional Language ROM.  The DIP Socket for the OL-ROM is located under a panel on the back, as is the select jumper (settings:  1-2 = Esperanto, 2-3 = OL-ROM).
  • Output panel
    • MIC (mono audio in).
    • SPK (mono audio out).
    • VB-7 port.

Grip II (1976)

The Grip II was over 13.5 times faster than the Nack I and by far faster than any other POD on the market when it was released.

  • 48 column, 5 line, 13-segment LCD display
  • Full-sized 53-key keyboard.
  • The tape drive is integral to the unit itself; the mechanism accepts a tape through a slot on the top side of the unit.
  • Expansion bay.  This bay is approximately 3"x5"x1" (plus external clearance of 3") and can host a variety of peripherals:
    • CR8 Cash register printer.  12 column, 8-pin dot matrix printer with black and red ribbon.  Uses 3" paper tape, 3" labels, or special sticker tape.  The printer can be used to print a newspaper, by printing the headers in banner format and the content in columns pasted onto a backing.  The printer can print 192x256 pixel 2-color pictures.
    • Auxiliary tape deck, record only.
    • FM radio receiver/tuner (mono).
    • LCD-521 Backlit 2-cell 120x160 pixel monochrome LCD monitor.  This technology uses two layers of LCD between three planes of glass to produce a greyscale effect.  Each pixel is an isosceles right triangle.  The top layer has the triangles in the upper-right half of the pixel square, while the bottom layer has the lower-left.  This produces three levels (0, 1/2, and 1), but the extra resolution can also be used to anti-alias images or create various patterns not available to square pixels.
    • 1/2 watt solar panel.
    • Digital Breadboard. 
    • VB-adapter (VB-17 and two VB-7's).
  • Six 6-volt incandescent light sockets with color-coded lenses, each linked to an output on the processor.  They are used to signal operation of hyperlink-like functions built in to the Grip.
  • Fully-integrated IC suite:
    • M6800 Microprocessor
    • ASIC RAM controller.
    • ASIC I/O controller.
    • ASIC tape-drive host adapter (hosts 2 drives).  The drive uses an optical sensor to determine the difference between side A and B (channel 0) or side C and D (channel 1).
    • ROM host, with integrated Esperanto ROM and Optional Language ROM.  The DIP Socket for the OL-ROM is located under a panel on the back, as is the select jumper (settings:  1-2 = Esperanto, 2-3 = OL-ROM).
  • Output panel
    • MIC (mono audio in).
    • SPK (mono audio out).
    • VRB-7 port.
    • Aux power in.


All versions of the Titan are built around the pmi261 -120 memory model and the i8008 microprocessor.  Early versions operated at 500 KHz, but later models operated at 800 KHz.  The Titan uses its own proprietary TOE operating environment and its own CLUs which are strongly based on the Spec-CE and Spec-CF CLUs used in the N1.5s.

IBM Bishop

The Bishop was IBMs attempt to enter the POD market.  It was a radically different internal architecture that was not modular.  Consequently, the design and development was fraught with diffcultly.  All applications are written to function alone as there is no OE, per se.  The Bishop was targeted at a Commonwealth market but did extremely poorly.

Display Elements

The Nack uses segmented character display.  In this arrangement, characters are made up of either 7 or 11 linear segments and may be augmented with additional diacritical dots.  The 7-segment character is composed of only horizontal and vertical segments and is best suited to diplay numerical data.  The 11-segment adds four more segments, arranged in an 'X" across the "8" of the 7-segment character.  It is much more suitable to alphabetic display.

The Nack I uses a 9-segment display, with the 7-segment character augmented with two dot, which look like a semicolon.

The Nack II and III use a hot-grid 13-segment vacuum display, with the 11-segment character augmented with the semicolon dots.

The Grips all use an LCD screen sandwiched between two planes of glass.  Characters are screen printed on as an array of arrays, separated by blank lanes 1-pixel wide.  This improves readability and simplifies both design and construction.

There are two basic grids, the 15-pix and 24-pix.  The 15-pix uses a 3x5 pixel character array in an open 5x7 pixel cell.

The 24-pix uses a 4x6 pixel character array in an open 6x8 pixel cell.

There is a theoretical 45-pix standard using a 5x9 pixel character array in an open 7x11 pixel array, but it was not built in the 70s.

            Char                Appearance
            7-seg                     '8'
            8-seg                     '8.'
            9-seg                     '8:'

            11-seg                   '$'
            12-seg                   '$.'
            13-seg                   '$:'

            Grid                 Char    Cell      Open
            15-pix              3x5      4x6      (5x7)
            24-pix              4x6      5x7      (6x8)
            45-pix              5x9      6x10    (7x11)

1 comment:

  1. Yes, I am a Uber-Mega-Geek currently with way to much time on my hands. Even Electrical Engineers call me 'geek'.